The present invention relates to a system for an inverter in which free wheel diodes are respectively connected in parallel to switching elements of positive and negative sides comprising a main circuit arm, and more particularly to a system for an inverter for effectively supressing a voltage drop and a waveform distortion caused by providing a duration for short-circuit prevention.
Inverters of a pulse width modulation (abbreviated PWM hereinafter) voltage type fundamentally operate to turn on one of the positive and negative switching elements of each phase and to turn off the other switching element. The inverters of this kind actually prevent a short-circuit of arms caused by a switching time-lag in the manner of providing a short-circuit preventing duration T.sub.d and turning off both the switching elements of the positive and negative sides at the same time during the duration T.sub.d. However, because the duration T.sub.d is an uncontrollable period when both switching elements turn off at the same time, an electric potential of an output terminal is determined by polarities of the current flowing through free wheel diodes.
FIG. 1 shows the aforementioned principle. If both switching elements of the positive and negative sides are turned off when a voltage E of a direct current (DC) power supply, in which a midpoint is grounded, is supplied to both ends of the arms, and when an output current I flows in the positive direction, a voltage of a terminal is "-E/2". On the contrary, if both switching elements are turned off when the current I flows in the negative direction, the voltage of the terminals is "+E/2".
As the short-circuit preventing duration T.sub.d is set at a constant period in this case, a constant voltage component having a rectangular waveform is superposed upon an output voltage, thereby reducing the output voltage in the region of the superposition and generating a waveform distortion of the output voltage. The reduction and distortion are described by using FIG. 2.
Namely, as shown in FIG. 2(a), when a current I.sub.u is supposed to flow through a load, a voltage V.sub.u is compared with a carrier wave. A phase of the current I.sub.u is delayed to the output voltage V.sub.u of U phase in a period .alpha.. PWM pulses U and U are generated to be supplied to the switching elements of the positive and negative sides as shown in FIG. 2(b). Each rising of the PWM pulses U and U is respectively delayed in the short-circuit preventing duration T.sub.d, to therefore control the switching elements to be turned on or off by the actual PWM pulses as shown in FIG. 2(c).
Accordingly, a voltage as indicated in FIG. 2(e) is superposed upon a waveform of the output voltage by providing the short-circuit preventing duration T.sub.d, so that an actual voltage as shown in FIG. 2(d) is output. Namely, as indicated by a dotted line in FIG. 2(e), the above state corresponds to the situation where the synchroneous voltage of the output current I.sub.u is superposed upon the sine wave. For example, the higher the power factor and the carrier frequency become by increase of a load, the lower the output voltage V.sub.u becomes, thereby resulting in creation of waveform distortion.
In this connection, when the motor is driven in a low speed region which is a low level of the output voltage, there are influences as follows:
1) an instability phenomenon at a light-load is promoted;
2) an output torque is reduced by deterioration of the voltage according to a rise of the power factor;
3) a rotation ripple increases according to an increase of the waveform distortion of the output voltage.
In order to solve the above problems, for example, an inverter control device is disclosed in Japanese Patent Application Laid-open No. 63-228971 (1988). The control device is briefly described hereinunder in accordance with FIGS. 3 and 4. Though a control circuit for three phases is shown in FIG. 3, one with only a U phase is described here in order to simplify the description.
In FIG. 3, the control device comprises a direct current source 1, an inverter main circuit 2 having arms 2U, 2V and 2W, an induction motor 3 as a load, an output frequency setter 4, a three-phase sinewave generator circuit 5, comparators 6U, 6V and 6W, a triangular wave generator circuit 7, a synchronizing signal generator circuit 8, delay circuits 9U, 10U and 11U, a logic circuit 12U, a change-over circuit 13U, a phase detector circuit 14, and a current detector circuit 15.
There is described operation of a device, as shown in FIG. 4, in the case of supposing that the short-circuit preventing duration T.sub.d comprises a delay time T.sub.d1 of the switching elements turned off, and a float time T.sub.d2 corresponding to a dispersion which is generated in circuit planning.
The delay circuit 9U delays a reference switching signal A1U from the comparator 6U for the time T.sub.d1 to generate a signal A2U. In the same way, the delay circuit 10U delays the signal A2U for the time T.sub.d1 to generate a signal A3U, and the delay circuit 11U delays the signal A3U for the time T.sub.d2 to generate a signal A4U. The logic circuit 12U receives the signals A1U, A2U, A3U and A4U and makes a driving signal U(B+) for the positive switching element by calculating a logical product "A2U*A3U" and a driving signal U(B-) for the negative switching element by calculating a logical product "A1U*A4U" to use them for an X mode when the output current flows in the positive direction, so as to output a control signal XU on the basis of the driving signals U(B+) and U(B-). Furthermore, the logic circuit 12U makes a driving U(B+) for the positive switching element by calculating a logical product "A1U*A4U" and a driving signal U(B-) for the negative switching element by calculating a logical product "A2U*A3U" to use them for a Y mode when the output current flows in the positive direction, so as to output a control signal YU on the basis of the driving signals U(B+) and U(B-). FIG. 4 shows only the X mode.
The change-over circuit 13U alternately outputs driving signals U and U responsive to a mode change-over signal MU by alternately selecting the control signals XU and YU. The phase detector 14 generates the mode change-over signal MU for changing over the modes X and Y on the basis of data about the output phase of the inverter and data representing a zero cross point of the U phase current supplied from the current detector 15.
In this case, a transistor U of positive side of the U phase arm is turned on during the same time of the reference switching signal A1U when the transistor U actually delays to be turned off for the time T.sub.d1 from the driving signal U(B+), thereby changing an output voltage V.sub.u-0 according thereto. On the other hand, the driving signal U(B-) supplied to the transistor U of the negative side of the U phase arm is turned on to be delayed for a period (T.sub.d1 +T.sub.d2) after the driving signal U(B+) supplied to the transistor U is turned off, thereby completely preventing the possibility of the short-circuiting of the arm. Though the detailed description is omitted, the same control is performed for the Y mode as for the X mode.
As a result, although the short-circuit preventing duration is provided for the main circuit arm, it is possible to sufficiently suppress the voltage drop and waveform distortion, so that it is possible to smoothly control the inverter without the torque changing and noises even if the control device is applied to the motor driving.
If central processing units (CPU) have the same function as the aforementioned control device, it is possible to greatly simplify the construction of the control device. However, if the entire functions of the conventional devices including an assignment of the control modes are realized, the processing amount becomes extremely large, so that the conventional device has the problem of being impossible to be realized by digital methods.